X-OPM: Explainable Automatic Digital On-Chip Power Modeling for Enhanced Robustness
Grounded in the design principles of synchronous digital VLSI circuits, X-OPM introduces a robust feature engineering framework that uses tree-based models to capture feature interactions and linear models for prediction.
ProofPaper ↗
Key points
- Proactive power management systems reduce processor dynamic power through runtime power prediction and power-aware scheduling.
- Accurate, stable and low-overhead digital on-chip power meters (OPMs) are crucial for improving the prediction quality.
- Recent studies have explored various modeling methods, including using linear models, decision trees, and multi-layer perceptrons (MLPs) to construct OPMs. However, most current approaches train models end-to-end without analyzing the physical interpretability of features, affecting their ability to generalize to unseen workloads.
- Evaluated on a commercial C906 vector processor, X-OPM consistently achieves $R^2 > 0.93$ across all workloads with sampling window size set below $8$ cycles.
Sources (1)
- [1]X-OPM: Explainable Automatic Digital On-Chip Power Modeling for Enhanced RobustnessarXiv (AI, ML, NLP, CV, robotics, multi-agent) · Oct 6, 03:09 PM
Grounded in the design principles of synchronous digital VLSI circuits, X-OPM introduces a robust feature engineering framework that uses tree-based models to capture feature interactions and linear models for prediction.
Proactive power management systems reduce processor dynamic power through runtime power prediction and power-aware scheduling.
Extractive summary: sentences quoted from the sources.
